Real-time optical character recognition on field programmable gate array for automatic number plate recognition system
Journal article
Sotudeh, Reza, Zhai, Xiaojun and Bensaali, Faycal 2013. Real-time optical character recognition on field programmable gate array for automatic number plate recognition system. IET Circuits, Devices & Systems. https://doi.org/10.1049/iet-cds.2012.0339
| Authors | Sotudeh, Reza, Zhai, Xiaojun and Bensaali, Faycal |
|---|---|
| Abstract | The last main stage in an automatic number plate recognition system (ANPRs) is optical character recognition (OCR), where the number plate characters on the number plate image are converted into encoded texts. In this study, an artificial neural network-based OCR algorithm for ANPR application and its efficient architecture are presented. The proposed architecture has been successfully implemented and tested using the Mentor Graphics RC240 field programmable gate arrays (FPGA) development board equipped with a 4M Gates Xilinx Virtex-4 LX40. A database of 3570 UK binary character images have been used for testing the performance of the proposed architecture. Results achieved have shown that the proposed architecture can meet the real-time requirement of an ANPR system and can process a character image in 0.7 ms with 97.3% successful character recognition rate and consumes only 23% of the available area in the used FPGA. |
| Keywords | Image processing; FPGA; Field programmable gate arrays; Optical character recognition; Neural nets; UK binary character images; ANPR application; Number plate charcters |
| Year | 2013 |
| Journal | IET Circuits, Devices & Systems |
| Publisher | The Institution of Engineering and Technology |
| ISSN | 1751-858X |
| 1751-8598 | |
| Digital Object Identifier (DOI) | https://doi.org/10.1049/iet-cds.2012.0339 |
| Web address (URL) | http://hdl.handle.net/10545/583882 |
| hdl:10545/583882 | |
| Publication dates | 01 Nov 2013 |
| Publication process dates | |
| Deposited | 14 Dec 2015, 11:13 |
| Series | Vol. 7 |
| Issue 6 | |
| Rights | Archived with thanks to IET Circuits, Devices & Systems |
| Contributors | University of Hertfordshire |
| File | File Access Level Open |
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